Design and Implementation of a Complete-Folding-Based Optimal-Combination Calibrated Segmented DAC for Static-Linearity Enhancement
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Abstract
This work proposes a digitally assisted segmented digital-to-analog converter (DAC) architecture that improves static linearity through a Complete Folding (CF)-based Optimal Combination Algorithm (OCA).The proposed converter operates in two phases. During startup calibration, mismatch-affected unit elements in the most-significant-bit (MSB) section are compared, sorted, recursively folded, and reorganized into compensated binary-weighted groups. The resulting element-to-group assignment is stored in a mapping memory.The digital input word is split into MSB and least-significant-bit (LSB) portions during normal operation; the calibrated MSB mapping is read from memory, a switch-control encoder activates the selected physical elements, and the LSB sub-DAC provides fine conversion. By moving the computationally intensive sorting and grouping process to startup, the run-time conversion path remains simple and deterministic. The architecture is suitable for synthesizable RTL development and can be evaluated using transfer-curve, differential-nonlinearity, integral-nonlinearity, monotonicity, area, power, and timing metrics. The proposed method offers a practical way to obtain improved static accuracy from imperfect unit elements without relying solely on device upsizing or continuous dynamic element scrambling
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